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Thread: Static RAM vs. Dynamic RAM




Static RAM vs. Dynamic RAM
user name
2006-07-12 06:17:09
Hello Nicolas,

I don't know such SRAM chips that you are looking for. We
combine memory
chips to the desired bus width.

Regards
Holger Krause

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Germany
Tel.: +49-(0)4131 203-1505
Fax.: +49-(0)4131 38562
E-Mail: Holger.Krausesieb-meyer.de
http://www.sieb-meyer.de


                                                            
              
             "Nicolas Benezan"                  
                          
             <nicolasbenezan.                   
                         
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                                        Re: [ColdFire]
Static RAM vs.      
             11.07.2006 20:13           Dynamic RAM         
              
                                                            
              
                                                            
              
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> I would like to know which kind of memory is
recommended for future
> designs: Static or dynamic? The size of memory is not a
problem: 8MB in
> this case are big enough. The main point is the access
time.

> My experience is that DDR-RAM (as an example of dynamic
RAM) is faster
for
> burst accesses just when the CPU is loading cache lines
but what about
> random accesses for data? I think SRAM is faster for
non-contiguous data
> blocks as well as for non burst data accesses and also
for cache
inhibited
> accesses.

Hello Holger,

the main reason why DRAM is widely used is because it's
cheap. SRAM needs
about 4 times more chip area and is therefore much more
expensive. Another
advantage of SRAM is that is easier to interface (hardware)
and to
configure
(software). Initialization of DRAM controller registers can
cause lots of
headache. So if you only need a few MBs then SRAM is
probably cheaper in
the
end.

BTW do you know an affordable 4 or 8MB SRAM chip with 32bit
bus width and
<15ns access time (3.3V synchronous bus interface
prefered)?

Cheers

Bene

--

Benezan Electronics, Stauffenbergstr. 26, D-72108 Rottenburg
Baisingen
CNC- und Steuerungstechnik, Elektronikentwicklung
----- Original Message -----
From: <holger.krausesieb-meyer.de>
To: <nicolasbenezan.de>
Sent: Tuesday, July 11, 2006 1:44 PM
Subject: [ColdFire] Static RAM vs. Dynamic RAM


Hello,



Would anyone agree or am I wrong?

Best regards
Holger Krause.

------------------------------------------------------------
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SIEB & MEYER AG
Software-Entwicklung CNC / Holger Krause
Auf dem Schmaarkamp 21
D-21339 Lüneburg
Germany
Tel.: +49-(0)4131 203-1505
Fax.: +49-(0)4131 38562
E-Mail: Holger.Krausesieb-meyer.de
http://www.sieb-meyer.de

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MCF548x Ethernet Driver (v0.11)
user name
2006-07-13 12:28:55
Hi Folks,

I'm trying to improve the MCF Ethernet Driver because it
stresses the CPU too 
much _altough_ it is using the DMA capabilities of Coldfire.

The fec_tx function (at the end to this Mail) allocates an
aligned buffer, 
because Ethernet DMA runs in 4-Byte aligned mode. I think
the problem is that 
every packet data must be copied via "memcpy" to
this aligned buffer, which 
is done by the cpu.

Is there a way - perhaps using "skb_reserve"- to
get an aligned sk_buff - so 
that this annoying memcpy could be ommited, or is it just
impossible and i 
have to run DMA in another Mode?


Yours Sincerely,
Tobias Simon

--------------- code snippet follows --------------------

int fec_tx(struct sk_buff *skb, struct net_device *dev)
{

	//Receive the pointer to the private structure
	struct fec_priv *fp = (struct fec_priv *) dev->priv;

	void *data, *data_aligned;
	int offset;

	data = kmalloc(skb->len + 15, GFP_DMA | GFP_ATOMIC);

	if (!data)
	{
		fp->fecpriv_stat.tx_dropped++;
		dev_kfree_skb(skb);
		return 0;
	}

	offset = (((unsigned long)virt_to_phys(data) + 15) &
0xFFFFFFF0) - (unsigned 
long)virt_to_phys(data);
	data_aligned = (void*)((unsigned long)data + offset);
	memcpy(data_aligned, skb->data, skb->len);


	spin_lock_irq(&fp->fecpriv_lock);

	// Initialize the descriptor
	fp->fecpriv_txbuf[fp->fecpriv_next_tx] = data;
	fp->fecpriv_txdesc[fp->fecpriv_next_tx].dataPointer =
(unsigned int) 
virt_to_phys(data_aligned);
	fp->fecpriv_txdesc[fp->fecpriv_next_tx].length =
skb->len;
	fp->fecpriv_txdesc[fp->fecpriv_next_tx].statCtrl |=
(MCD_FEC_END_FRAME | 
MCD_FEC_BUF_READY);
	fp->fecpriv_next_tx = (fp->fecpriv_next_tx + 1) &
FEC_TX_INDEX_MASK;

	if (fp->fecpriv_txbuf[fp->fecpriv_current_tx]
&& fp->fecpriv_current_tx == 
fp->fecpriv_next_tx)
		netif_stop_queue(dev);

	spin_unlock_irq(&fp->fecpriv_lock);

	// Tell the DMA to continue the transmission
	MCD_continDma(fp->fecpriv_fec_tx_channel);

	dev_kfree_skb(skb);

	dev->trans_start = jiffies;

	return 0;
}
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MCF548x Ethernet Driver (v0.11)
user name
2006-07-13 15:44:36
Let the dma do the work for you. Set up two descriptors...
the first one
points at the first few octets that needed realignment and
the second
one points at the rest of the data after you remove the
first few octets
from it in order to align that. Does that make sense?

If the data starts on address 1, then move three octets to
an aligned
address. Now the three octets are aligned, and the rest of
the data is
aligned on address 4.

First check to see if you even need to realign anything. If
not, then
circumvent everything and use one descriptor. If realignment
is
necessary, then calculate how many bytes you need to remove
from the
start of the original data in order to align it. Then align
the removed
octets and set up the first descriptor to transmit these
(don't set the
MCD_FEC_END_FRAME flag). The second descriptor would then
point at rest
of the data (with MCD_FEC_END_FRAME flag set).

One point though, set up the second descriptor first with
the
MCD_FEC_BUF_READY flag set before setting MCD_FEC_BUF_READY
in the
first. As soon as that flag is set, the dma will start
sending, so just
to be safe, have them both ready when handing the first off
to the dma.

I haven't done any timings with this sort of thing, but I
assume it
would be much faster than what you have. If you can, it
would be
interesting to see what sort of speedup would result.

-Scott Hauck
NextNet/Motorola


On Thu, 2006-07-13 at 14:28 +0200, Tobias Simon wrote:
> Hi Folks,
> 
> I'm trying to improve the MCF Ethernet Driver because
it stresses the CPU too 
> much _altough_ it is using the DMA capabilities of
Coldfire.
> 
> The fec_tx function (at the end to this Mail) allocates
an aligned buffer, 
> because Ethernet DMA runs in 4-Byte aligned mode. I
think the problem is that 
> every packet data must be copied via
"memcpy" to this aligned buffer, which 
> is done by the cpu.
> 
> Is there a way - perhaps using
"skb_reserve"- to get an aligned sk_buff - so 
> that this annoying memcpy could be ommited, or is it
just impossible and i 
> have to run DMA in another Mode?
> 
> 
> Yours Sincerely,
> Tobias Simon
> 
> --------------- code snippet follows
--------------------
> 
> int fec_tx(struct sk_buff *skb, struct net_device *dev)
> {
> 
> 	//Receive the pointer to the private structure
> 	struct fec_priv *fp = (struct fec_priv *)
dev->priv;
> 
> 	void *data, *data_aligned;
> 	int offset;
> 
> 	data = kmalloc(skb->len + 15, GFP_DMA |
GFP_ATOMIC);
> 
> 	if (!data)
> 	{
> 		fp->fecpriv_stat.tx_dropped++;
> 		dev_kfree_skb(skb);
> 		return 0;
> 	}
> 
> 	offset = (((unsigned long)virt_to_phys(data) + 15)
& 0xFFFFFFF0) - (unsigned 
> long)virt_to_phys(data);
> 	data_aligned = (void*)((unsigned long)data + offset);
> 	memcpy(data_aligned, skb->data, skb->len);
> 
> 
> 	spin_lock_irq(&fp->fecpriv_lock);
> 
> 	// Initialize the descriptor
> 	fp->fecpriv_txbuf[fp->fecpriv_next_tx] = data;
>
	fp->fecpriv_txdesc[fp->fecpriv_next_tx].dataPointer =
(unsigned int) 
> virt_to_phys(data_aligned);
> 	fp->fecpriv_txdesc[fp->fecpriv_next_tx].length =
skb->len;
> 	fp->fecpriv_txdesc[fp->fecpriv_next_tx].statCtrl
|= (MCD_FEC_END_FRAME | 
> MCD_FEC_BUF_READY);
> 	fp->fecpriv_next_tx = (fp->fecpriv_next_tx + 1)
& FEC_TX_INDEX_MASK;
> 
> 	if (fp->fecpriv_txbuf[fp->fecpriv_current_tx]
&& fp->fecpriv_current_tx == 
> fp->fecpriv_next_tx)
> 		netif_stop_queue(dev);
> 
> 	spin_unlock_irq(&fp->fecpriv_lock);
> 
> 	// Tell the DMA to continue the transmission
> 	MCD_continDma(fp->fecpriv_fec_tx_channel);
> 
> 	dev_kfree_skb(skb);
> 
> 	dev->trans_start = jiffies;
> 
> 	return 0;
> }
>
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-- 

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . .

        h a u c k s    n e x t n e t w i r e l e s s . c o m

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MCF548x Ethernet Driver (v0.11)
user name
2006-07-18 07:27:11
Thank you!

I will try to implement this idea.

Tobias Simon

> Let the dma do the work for you. Set up two
descriptors... the first one
> points at the first few octets that needed realignment
and the second
> one points at the rest of the data after you remove the
first few octets
> from it in order to align that. Does that make sense?
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