>I've heard watchdog
> resets likened to hitting a dead man on the head with a
hammer, in the hope
> that he wakes up again.
Lol, not really the perfect metaphore, but hilarous.
In any case I have no problem with handing the customer a
watchdog if they
want onem, and it certainly doesn't hurt the system.
My problem with this particular watchdog design is the
combination of it's
write once feature with the fact that it's on be default at
reset.
Either one would be fine by themselves, but together they
render the circuit
useless. As I understand it, Freescale disables the thing in
their own
bootloader! How useful could it be?
I have never seen this "feature" combination in
any other embedded processor
and I think there's a reason for that.
Any bootloader the system runs will have to turn it off,
because it doesn't
know the boot time of it's final OS/program, and it
shouldn't be forcing that
program to use a watchdog timer either. This in turn means
that the OS will
never have the option to use it.
If any Freescale engineers are listening, please don't put
this silicon in
future Coldfire processors, or better yet, build a 5282
Coldfire clone with a
sane watchdog (if you haven't already). I am not the only
person annoyed by
this, browse through the uClinux archives for "5282
watchdog"
NZG
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