dcw.web gmail.com wrote:
> 1. Is there a better way?
I don't know if you think that I am able to help...
> 2. Am I crazy for trying this?
Absoluetly not. I think that make should be used to automate
as much as
possible. In this case the compiler has to do most of the
job to find the
dependencies.
> 36$(SC_OBJ_DIR)/%.o : %.cpp
> 37 $(SCCOM) $<
> 38 sed -e 's|^[^:]*:|$(SC_OBJ_DIR)/&|' $*.d >
$(SC_OBJ_DIR)/$*.P;
> 39 sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/
*\$$//'
> 40 -e'/^$$/ d' -e 's/$$/ :/' < $*.d >>
$(SC_OBJ_DIR)/$*.P;
> 41 rm -f $*.d
I don't think you need all that sed, and I don't realize why
you want to
remove the dependeny file after the compilation. Here are
some snippets
from one of my makefiles:
OBJS = $(FILES:%=$(OBJ)/%.o)
DEPS = $(FILES:%=$(DEP)/%.d)
$(OBJS): $(OBJ)/%.o: $(SRC)/%.c $(DEP)/%.d
$(CC) $(CFLAGS) -o $ $<
$(DEPS): $(DEP)/%.d: $(SRC)/%.c
ifeq ($(MAKECMDGOALS),quiet)
if((printf "$ $(OBJ)/";$(CC) -MM
$(CFLAGS) $< )> $ ); then true;
else rm $ ; false; fi
else
if((printf "$ $(OBJ)/";$(CC) -MM
$(CFLAGS) $< )> $ ); then true;
else rm $ ; false; fi
endif
ifneq ($(MAKECMDGOALS),mrproper)
ifneq ($(wildcard $(DEPS)),)
include $(wildcard $(DEPS))
endif
endif
So whenever an object file is created I make sure that the
corresponding
d file exist. If it doesn't already exist it is created and
the object
file is rebuilt. If the .d file exist it is included at the
end of the
makefile and its rules will be taken into consideration by
make. I have a
rule "mrproper" which removes not only all object
files but also the .d
files.
regards Henrik
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