Re: text functions in implicit rules

Jan Althaus wrote:

> is it at all possible to create an implicit rule that'd
do something
> similar to:
> %.o: $(subst foo,bar,%.cpp)
> 
> The reason I'm asking is that I'd like to have a
makefile that takes
> a list of source files that are potentially scattered
over different
> directories, but builds the objects/dependency files
into a single,
> common dir.
> The idea would've been to mangle the names so e.g.
../foo/bar.cpp
> would become __foobar.o
> 
> Am I fundamentally asking the wrong question? Is there
a way of doing
> this without scattering the objects/dependencies over
the sources
> dirs? (in a way that allows the list to contain
absolute paths and
> the like?)

I don't know that you can do this with implicit rules, but
you can do it
by using foreach to evalulate a function that generates the
dependency
for each target:

define mkdepend
$(addsuffix .o,$(subst .,_,$(subst /,,$(basename $(1))))): $(1)
endef

src = ../foo/bar1.cpp ../foo/bar2.cpp ../foo/bar3.cpp

$(foreach s,$(src),$(eval $(call mkdepend,$(s))))

You can change 'eval' to 'info' to debug this, in which case
you'll see
the produced rules:

__foobar1.o: ../foo/bar1.cpp
__foobar2.o: ../foo/bar2.cpp
__foobar3.o: ../foo/bar3.cpp

Brian


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Eeeexcellent. That did the trick. 
Thanks!!

Jan

PS: Should anyone care, here's what I ended up using:


MANGLESLASH := 
MANGLEDOTDOT := __
MANGLECOLON := --

# Mangling
define mangle
$(subst :,$(MANGLECOLON), $(subst ..,$(MANGLEDOTDOT),$(subst
/,$ 
(MANGLESLASH),$(basename $(1)))))
endef

define mangleobj
$(OBJSDIR)/$(addsuffix .o,$(call mangle,$(1)))
endef

define mangledep
$(DEPSDIR)/$(addsuffix .d,$(call mangle,$(1)))
endef

# Object targets
define mkobject
$(call mangleobj,$(1)) : $(1) $(call mangledep,$(1))
	echo Compiling: $(1)
	$(NE)$(CXX) $(CFLAGS) $(CPPFLAGS) $(addprefix -I,
$(INCLUDE)) -c -o $ 
(call mangleobj,$(1)) $(1)
endef

$(foreach s,$(CPPSRC),$(eval $(call mkobject,$(s))))

# Dependency file targets
define mkdepend
$(call mangledep,$(1)) : $(1)
	echo Dependencies: $(1)
	$(NE)$(CXX) -M -MF $(call mangledep,$(1)) -MT $(call
mangleobj,$(1))  
$(CFLAGS) $(CPPFLAGS) $(addprefix -I, $(INCLUDE)) $(1)
endef

$(foreach s,$(CPPSRC),$(eval $(call mkdepend,$(s))))



On 13 Apr 2008, at 00:29, Brian Dessent wrote:
> Jan Althaus wrote:
>
>> is it at all possible to create an implicit rule
that'd do something
>> similar to:
>> %.o: $(subst foo,bar,%.cpp)
>>
>> The reason I'm asking is that I'd like to have a
makefile that takes
>> a list of source files that are potentially
scattered over different
>> directories, but builds the objects/dependency
files into a single,
>> common dir.
>> The idea would've been to mangle the names so e.g.
../foo/bar.cpp
>> would become __foobar.o
>>
>> Am I fundamentally asking the wrong question? Is
there a way of doing
>> this without scattering the objects/dependencies
over the sources
>> dirs? (in a way that allows the list to contain
absolute paths and
>> the like?)
>
> I don't know that you can do this with implicit rules,
but you can  
> do it
> by using foreach to evalulate a function that generates
the dependency
> for each target:
>
> define mkdepend
> $(addsuffix .o,$(subst .,_,$(subst /,,$(basename $(1))))): $(1)
> endef
>
> src = ../foo/bar1.cpp ../foo/bar2.cpp ../foo/bar3.cpp
>
> $(foreach s,$(src),$(eval $(call mkdepend,$(s))))
>
> You can change 'eval' to 'info' to debug this, in which
case you'll  
> see
> the produced rules:
>
> __foobar1.o: ../foo/bar1.cpp
> __foobar2.o: ../foo/bar2.cpp
> __foobar3.o: ../foo/bar3.cpp
>
> Brian



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