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| CUDA support | 2007-11-02 10:41:52 | 0 | |
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| Re: Hardware Digest, Vol 22, Issue 1 | 2007-08-25 16:03:22 | 1 | |
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| Re: Hardware Digest, Vol 22, Issue 1 | 2007-08-24 07:26:47 | 0 | |
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| Re: Hardware Digest, Vol 22, Issue 1 | 2007-08-23 23:42:03 | 1 | |
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| Using Video Card Processors | 2007-08-23 09:41:37 | 1 | |
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| Re: RSA Challenges | 2007-06-04 17:44:25 | 0 | |
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| Re: RSA Challenges | 2007-06-04 15:12:51 | 0 | |
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| sponsor, donations? | 2007-06-03 16:19:05 | 0 | |
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| Re: RSA Challenges | 2007-06-01 17:51:59 | 0 | |
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| Re: RC5 Challenges cancelled by RSA | 2007-06-01 13:58:03 | 0 | |
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| RC5 Challenges cancelled by RSA | 2007-05-30 16:54:50 | 0 | |
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| RC5 Challenges cancelled by RSA | 2007-05-30 14:33:52 | 0 | |
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| RC5 verilog code generator | 2007-03-14 10:44:39 | 1 | |
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| RC5 core update | 2007-03-13 09:17:33 | 0 | |
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| Re: RC5 on FPGA, updated results | 2007-02-27 10:48:34 | 2 | |
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| Re: Your message to an inactive list at iastate.edu | 2007-02-22 09:50:00 | 0 | |
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| Re: RC5 on FPGA, updated results | 2007-02-21 22:41:03 | 0 | |
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| Re: RC5 on FPGA, updated results | 2007-02-21 14:56:47 | 0 | |
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| RC5 on FPGA, updated results | 2007-02-21 10:49:01 | 2 | |
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| RC5 on FPGA, updated results | 2006-12-22 09:19:01 | 0 | |
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| Status on FPGA PCB | 2006-12-15 17:02:31 | 4 | |
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| RC5 vhdl files online | 2006-12-05 15:11:00 | 0 | |
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| Status on FPGA PCB | 2006-12-05 13:12:29 | 2 | |
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| Status on FPGA PCB | 2006-12-05 06:05:44 | 0 | |
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| Status on FPGA PCB | 2006-12-05 05:58:51 | 1 | |
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| Status on FPGA PCB | 2006-12-05 03:38:55 | 0 | |
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| Attached PDF of work in progress FPGA PCB | 2006-12-01 15:49:16 | 0 | |
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| Spartan3: intermediate results (sounds good) | 2006-11-30 09:20:18 | 0 | |
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| Suggestions for FPGA RC5-72 core work verification? | 2006-11-29 17:41:12 | 0 | |
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| Suggestions for FPGA RC5-72 core work verification? | 2006-11-29 07:10:55 | 1 | |
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| partially unrolled? | 2006-11-28 17:13:53 | 0 | |
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| partially unrolled? | 2006-11-28 16:58:58 | 0 | |
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| partially unrolled? | 2006-11-28 16:49:36 | 2 | |
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| partially unrolled? | 2006-11-28 13:37:10 | 0 | |
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| RC5 VHDL sources available | 2006-11-27 21:52:01 | 0 | |
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| matching unrolled RC5-72 core generator | 2006-11-26 21:49:00 | 0 | |
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| Fully unrolled RC5 core, pipelined and retimed using LUT RAMs | 2006-11-26 14:47:27 | 0 | |
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| Fully unrolled RC5 on FPGA | 2006-11-21 08:04:30 | 2 | |
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| Fully unrolled RC5 on FPGA | 2006-11-20 09:33:11 | 1 | |
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| Fully unrolled RC5 on FPGA | 2006-11-18 08:24:38 | 0 | |
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| Fully unrolled RC5 on FPGA | 2006-11-17 18:36:30 | 1 | |
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| GPU-based RC5 cracking | 2006-11-16 11:45:23 | 0 | |
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| Some "more parallel" stuffs | 2006-11-16 11:40:25 | 0 | |
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| GPU-based RC5 cracking | 2006-11-16 11:17:41 | 1 | |
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| GPU-based RC5 cracking | 2006-11-16 07:39:01 | 0 | |
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| Fully unrolled RC5 on FPGA | 2006-11-16 04:57:05 | 0 | |
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| Fully unrolled RC5 on FPGA | 2006-11-15 23:43:10 | 0 | |
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| Fully unrolled RC5 on FPGA | 2006-11-15 23:43:10 | 0 | |
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| Fully unrolled RC5 on FPGA | 2006-11-15 22:57:47 | 0 | |
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| Fully unrolled RC5 on FPGA | 2006-11-15 22:57:47 | 0 | |
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