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Thread: Re: SIR Reset with todays sources




Re: SIR Reset with todays sources
country flaguser name
Germany
2007-03-23 04:03:29
On Mon, Mar 19, 2007 at 11:54:00PM +0000, Eduardo Horvath
wrote:
> On Tue, 20 Mar 2007, matthew green wrote:
> 
> >    As the `SIR Reset' is not solved yet I tried
this:
> >    
> >    - Replace all `sir' opcodes to `nop' in
locore.s.
> >    - Put them back until I get the `SIR Reset'
instead of a hard lock.
> >    
> >    Thus tracked it down to this `sir'.
> >    
> >    --- locore.s	2007-02-23 02:06:38.000000000
+0100
> >    +++ locore.s	2007-03-19 13:01:54.000000000
+0100
> >     -2099,5 +2099,5  winfix:
> >     	!!
> >     	wrpr	%g2, %tl		! Restore trap level.
> >    -	sir				! Just issue a reset and don't try to
recover.
> >    +	nop				! Just issue a reset and don't try to
recover.
> >     	mov	%fp, %l6		! Save the frame pointer
> >     	set	EINTSTACK+USPACE+CC64FSZ-STKB, %fp ! Set
the frame pointer to the middle of the idle stack
> >    
> >    Is it really possible to reach this statement?
> >    
> >    Any chance to get a trace or otherwise debug
it?
> 
> Do a .trap-registers and compare your the different TPC
values to specific 
> sir instructions in locore.s.  You can use GDB on the
kernel for the 
> latter.
> 
> > what does "ctrace" from the prom say at
this point?  that should
> > give you a stack trace you can feed addresses back
to GDB for
> > to get line numbers.
> 
> ctrace is unlikely to help here since the machine state
is completely 
> stuffed up.
> 
> Try enabling traptrace and then see if you can dump the
contents of
> the traptrace buffer at OpenBoot.  That should give you
some idea what set 
> of conditions led to this situation.  You can also try
changing the sir 
> instructions to jump to a bit of code that completely
reinitializes the 
> processor state and enters DDB, that way you can dump
the traptrace buffer 
> more easily.
> 
> Eduardo


- In trap.c dopanic() I put the `DEBUGGER(type, tf);' before
the first printf.

  Now got this on the console:

  kernel trap 30: data access exception
  kernel trap 34: mem address not aligned
  ...
  SIR reset

- Then reimplemented some kind of trap_trace and got the
appended trace.

  At least entry 122 (data fault on address 0x0b7e6000)
looks suspect.
  Corressponding source is:

	0000000001009a70 <copyinstr>:
	...
	1009a90:       da 73 20 10     stx  %o5, [ %o4 + 0x10 ]
	1009a94:       9a 10 00 09     mov  %o1, %o5
	1009a98:       c2 ca 02 20     ldsba  [ %o0 ] #ASI_AIUS,
%g1
    ->	1009a9c:       c2 2a 40 00     stb  %g1, [ %o1 ]
	1009aa0:       92 02 60 01     inc  %o1

Any ideas anyone?

Trap trace (eldest first):

  21: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a094
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  22: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a094
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  23: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  24: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  25: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  26: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffa261 tpc=0x000000004073baa4
tfault=0x4092005c
      userland

  27: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0xffffffffffffa361 tpc=0x0000000040742f5c
tfault=0x0022205c
      userland

  28: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0x000000000ca07041 tpc=0x00000000012691b4
tfault=0x01c32000
      uvm_pagealloc_pgfl()  uvm/uvm_page.c:984

  29: tl=1 tt=0x046 (intr6) tstate=0x80000000
      sp=0x000000000ca07101 tpc=0x00000000012692a4
tfault=0x022c2000
      uvm_unlock_fpageq()  uvm/uvm_page.c:1633

  30: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  31: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  32: tl=1 tt=0x04e (intr14) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  33: tl=1 tt=0x04a (intr10) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  34: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  35: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  36: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  37: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  38: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a098
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  39: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a098
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  40: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  41: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  42: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  43: tl=1 tt=0x04a (intr10) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  44: tl=1 tt=0x041 (intr11) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  45: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a094
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  46: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a094
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  47: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  48: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  49: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  50: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  51: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  52: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  53: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a098
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  54: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a098
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  55: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a084
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  56: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a084
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  57: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  58: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  59: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  60: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a07c
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  61: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  62: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  63: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  64: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  65: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  66: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  67: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  68: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  69: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a084
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  70: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a084
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  71: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  72: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  73: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  74: tl=1 tt=0x045 (intr5) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  75: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0xffffffffffffb111 tpc=0x0000000040742684
tfault=0x0022005d
      userland

  76: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0xffffffffffffa041 tpc=0x000000004030644c
tfault=0x4071005d
      userland

  77: tl=1 tt=0x046 (intr6) tstate=0x80000000
      sp=0xffffffffffffa041 tpc=0x000000004030644c
tfault=0x4071005d
      userland

  78: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb8d1 tpc=0x000000004073a374
tfault=0x0c9e0000
      userland

  79: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb8d1 tpc=0x000000004073a374
tfault=0x0021605b
      userland

  80: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb8d1 tpc=0x000000004073a374
tfault=0x0021605b
      userland

  81: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb831 tpc=0x000000004073a294
tfault=0x4070c05b
      userland

  82: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0xffffffffffffa361 tpc=0x0000000040742f5c
tfault=0x0022205d
      userland

  83: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffa1f1 tpc=0x000000004073992c
tfault=0x4030205d
      userland

  84: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0xffffffffffffb781 tpc=0x000000004030683c
tfault=0x4070805d
      userland

  85: tl=1 tt=0x046 (intr6) tstate=0x80000000
      sp=0xffffffffffffb781 tpc=0x000000004030683c
tfault=0x4070805d
      userland

  86: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb9d1 tpc=0x0000000040739888
tfault=0x4071405d
      userland

  87: tl=1 tt=0x060 (interrupt_vector) tstate=0x58000602
      sp=0x000000000ca070d1 tpc=0x000000000125f814
tfault=0x022c8000
      uvm_rb_subtree_space()  uvm/uvm_map.c:342

  88: tl=1 tt=0x046 (intr6) tstate=0x58000602
      sp=0x000000000ca070d1 tpc=0x000000000125f814
tfault=0x022c8000
      uvm_rb_subtree_space()  uvm/uvm_map.c:342

  89: tl=1 tt=0x060 (interrupt_vector) tstate=0x58000604
      sp=0x000000000ca06f61 tpc=0x0000000001269290
tfault=0x0248c000
      splvm()  ./machine/psl.h:427

  90: tl=1 tt=0x046 (intr6) tstate=0x58000604
      sp=0x000000000ca06f61 tpc=0x0000000001269290
tfault=0x0248c000
      splvm()  ./machine/psl.h:427

  91: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb0f1 tpc=0x0000000040739aec
tfault=0x40920058
      userland

  92: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb531 tpc=0x000000004073d184
tfault=0x40702058
      userland

  93: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb531 tpc=0x000000004073d184
tfault=0x40702058
      userland

  94: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb0f1 tpc=0x0000000040739aec
tfault=0x40702058
      userland

  95: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb661 tpc=0x000000004073a294
tfault=0x00102058
      userland

  96: tl=1 tt=0x046 (intr6) tstate=0x80000000
      sp=0x000000000ca07621 tpc=0x0000000001008700
tfault=0x4090e05d
      Ldatafault_internal() 
arch/sparc64/sparc64/locore.s:0

  97: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffba31 tpc=0x0000000040309f48
tfault=0x4090e05d
      userland

  98: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0xffffffffffffb971 tpc=0x0000000040308ad4
tfault=0x4090005d
      userland

  99: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0xffffffffffffb971 tpc=0x0000000040308c38
tfault=0x4070005d
      userland

 100: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffa6f1 tpc=0x0000000040739964
tfault=0x4090c058
      userland

 101: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0x000000000c9a6fe1 tpc=0x000000000100a080
tfault=0x4090c058
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

 102: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb661 tpc=0x000000004073a294
tfault=0x0c088000
      userland

 103: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb661 tpc=0x000000004073a294
tfault=0x0c9f0000
      userland

 104: tl=1 tt=0x045 (intr5) tstate=0x80000000
      sp=0x000000000c9a6fe1 tpc=0x000000000100a080
tfault=0x4090c058
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

 105: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0x00000000e00170c1 tpc=0x00000000012cb4f0
tfault=0x4090c058
      pool_get()  kern/subr_pool.c:1130

 106: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0xffffffffffffc251 tpc=0x0000000040304534
tfault=0x408fc05d
      userland

 107: tl=1 tt=0x046 (intr6) tstate=0x80000000
      sp=0xffffffffffffc251 tpc=0x0000000040304534
tfault=0x024a2000
      userland

 108: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffad41 tpc=0x000000004073a1b4
tfault=0x407ae05b
      userland

 109: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffafd1 tpc=0x000000004073ac34
tfault=0x4090605b
      userland

 110: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffaf01 tpc=0x000000004073d184
tfault=0x4090c05b
      userland

 111: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffafd1 tpc=0x000000004073d258
tfault=0x4070c05b
      userland

 112: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0xffffffffffffaf11 tpc=0x000000004074c758
tfault=0x4021605b
      userland

 113: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffb661 tpc=0x000000004073a294
tfault=0x0c0a4000
      userland

 114: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000600
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

 115: tl=1 tt=0x046 (intr6) tstate=0x1d000600
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

 116: tl=1 tt=0x100 (sun syscall) tstate=0x80000000
      sp=0xffffffffffffa6f1 tpc=0x000000004073a25c
tfault=0xffffc058
      userland

 117: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0x000000000ca06ee1 tpc=0x000000000124eddc
tfault=0x0c01c000
      ufs_dirbadentry()  ufs/ufs/ufs_bswap.h:58

 118: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0xffffffffffffc321 tpc=0x000000004030a538
tfault=0x4092005d
      userland

 119: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0x000000000ca071b1 tpc=0x00000000013f6830
tfault=0x0c9e6000
      pmap_enter()  arch/sparc64/sparc64/pmap.c:1805

 120: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000600
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

 121: tl=1 tt=0x04a (intr10) tstate=0x1d000600
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0xfffaa000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

 122: tl=1 tt=0x030 (data fetch fault) tstate=0x80000000
      sp=0x000000000ca071a1 tpc=0x0000000001009a9c
tfault=0x0b7e6000
      copyinstr()  arch/sparc64/sparc64/locore.s:0

 123: tl=1 tt=0x030 (data fetch fault) tstate=0x11000607
      sp=0x000000000ca06c11 tpc=0x0000000001009ed0
tfault=0x0021605b
      Lcopyout_doubles() 
arch/sparc64/sparc64/locore.s:0

 124: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0x000000000ca070c1 tpc=0x0000000001290770
tfault=0x0021605b
      vmcmd_readvn()  kern/exec_subr.c:292

 125: tl=1 tt=0x046 (intr6) tstate=0x80000000
      sp=0x000000000ca070c1 tpc=0x0000000001290770
tfault=0x0021605b
      vmcmd_readvn()  kern/exec_subr.c:292

 126: tl=2 tt=0x060 (interrupt_vector) tstate=0x15000604
      sp=0x00000000e0016a41 tpc=0x000000000135711c
tfault=0xe00ac000
      rasops32_putchar()  dev/rasops/rasops32.c:126

 127: tl=2 tt=0x046 (intr6) tstate=0x15000604
      sp=0x00000000e0016a41 tpc=0x000000000135711c
tfault=0xe00ac000
      rasops32_putchar()  dev/rasops/rasops32.c:126

   0: tl=1 tt=0x060 (interrupt_vector) tstate=0x80000000
      sp=0x000000000ca070e1 tpc=0x000000000125da6c
tfault=0x022d6000
      uvm_km_free()  uvm/uvm_km.c:671

   1: tl=1 tt=0x046 (intr6) tstate=0x80000000
      sp=0x000000000ca070e1 tpc=0x000000000125da6c
tfault=0x022d6000
      uvm_km_free()  uvm/uvm_km.c:671

   2: tl=1 tt=0x046 (intr6) tstate=0x1d000600
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

   3: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000603
      sp=0x00000000e00174a1 tpc=0x00000000012e6fdc
tfault=0x02548000
      ndflush()  kern/tty_subr.c:227

   4: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000600
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

   5: tl=1 tt=0x046 (intr6) tstate=0x1d000600
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x02548000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

   6: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a084
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

   7: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

   8: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

   9: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  10: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  11: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  12: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  13: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  14: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  15: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a084
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  16: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a084
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  17: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  18: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a080
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  19: tl=1 tt=0x060 (interrupt_vector) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0

  20: tl=1 tt=0x046 (intr6) tstate=0x1d000605
      sp=0x000000000ca06b11 tpc=0x000000000100a088
tfault=0x0c088000
      idle_nolock()  arch/sparc64/sparc64/locore.s:0


-- 
Juergen Hannken-Illjes - hannkeneis.cs.tu-bs.de - TU
Braunschweig (Germany)


Re: SIR Reset with todays sources
country flaguser name
United States
2007-03-23 15:35:38
On Fri, 23 Mar 2007, Juergen Hannken-Illjes wrote:

> - In trap.c dopanic() I put the `DEBUGGER(type, tf);'
before the first printf.
> 
>   Now got this on the console:
> 
>   kernel trap 30: data access exception
>   kernel trap 34: mem address not aligned
>   ...
>   SIR reset
> 
> - Then reimplemented some kind of trap_trace and got
the appended trace.
> 
>   At least entry 122 (data fault on address 0x0b7e6000)
looks suspect.
>   Corressponding source is:
> 
> 	0000000001009a70 <copyinstr>:
> 	...
> 	1009a90:       da 73 20 10     stx  %o5, [ %o4 + 0x10
]
> 	1009a94:       9a 10 00 09     mov  %o1, %o5
> 	1009a98:       c2 ca 02 20     ldsba  [ %o0 ]
#ASI_AIUS, %g1
>     ->	1009a9c:       c2 2a 40 00     stb  %g1, [
%o1 ]
> 	1009aa0:       92 02 60 01     inc  %o1

Maybe,  Depends on what it's being copied to.  Could be
pageable
kernel memory, taking a protection/refcount fault, or the
buffer
cache to map in a buffer cache page.

> 
> Any ideas anyone?
> 

I'm not seeing anything obviously wrong in the trace.  I
notice
that you only have the trap entries instrumented.  You
really should 
instrument the trap returns as well.  It's more than likely
the problem is 
there.  Often what happens is the trap return code takes an
MMU fault in 
an inconvenient location which causes it to lose part of the
state it's 
trying to restore.  Also, add a trace point and dump the
register state 
someplace safe if you can just before executing the SIR
instruction.  That 
will give some insight as to what part of the machine state
is stuffed up.  
Oh, and do you know which specific SIR is being hit?

Eduardo

Re: SIR Reset with todays sources
country flaguser name
Germany
2007-03-23 17:21:59
On Fri, Mar 23, 2007 at 10:03:29AM +0100, Juergen
Hannken-Illjes wrote:
> Any ideas anyone?

Could you try to find out what %g4 contains when we hit the
SIR?
It should have PSTATE and ASI from the previous trap. Not
sure if you already
documented the "current" %tstate value, if not,
that would be interesting
too.

Martin

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