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Thread: OpenSSL: openssl/doc/crypto/ OPENSSL_ia32cap.pod




OpenSSL: openssl/doc/crypto/ OPENSSL_ia32cap.pod
user name
2006-10-23 07:44:52
  OpenSSL CVS Repository
  http://cvs.openssl.org/
 
____________________________________________________________
________________

  Server: cvs.openssl.org                  Name:   Andy
Polyakov
  Root:   /v/openssl/cvs                   Email:  approopenssl.org
  Module: openssl                          Date:  
23-Oct-2006 09:44:52
  Branch: HEAD                             Handle:
2006102308445100

  Modified files:
    openssl/doc/crypto      OPENSSL_ia32cap.pod

  Log:
    OPENSSL_ia32cap.pod update.

  Summary:
    Revision    Changes     Path
    1.5         +7  -6     
openssl/doc/crypto/OPENSSL_ia32cap.pod
 
____________________________________________________________
________________

  patch -p0 <<' .'
  Index: openssl/doc/crypto/OPENSSL_ia32cap.pod
 
============================================================
================
  $ cvs diff -u -r1.4 -r1.5 OPENSSL_ia32cap.pod
  --- openssl/doc/crypto/OPENSSL_ia32cap.pod	23 Jun 2005
21:45:37 -0000	1.4
  +++ openssl/doc/crypto/OPENSSL_ia32cap.pod	23 Oct 2006
07:44:51 -0000	1.5
   -17,18 +17,19 
   Intel Application Note #241618). Naturally it's
meaningful on IA-32[E]
   platforms only. The variable is normally set up
automatically upon
   toolkit initialization, but can be manipulated afterwards
to modify
  -crypto library behaviour. For the moment of this writing
three bits are
  +crypto library behaviour. For the moment of this writing
five bits are
   significant, namely bit #28 denoting Hyperthreading,
which is used to
  -distinguish Intel P4 core, bit #26 denoting SSE2 support,
and bit #4
  -denoting presence of Time-Stamp Counter. Clearing bit #26
at run-time
  -for example disables high-performance SSE2 code present
in the crypto
  +distinguish Intel P4 core, bit #26 denoting SSE2 support,
bit #25
  +denoting SSE support, bit #23 denoting MMX support, and
bit #4 denoting
  +presence of Time-Stamp Counter. Clearing bit #26 at
run-time for
  +example disables high-performance SSE2 code present in
the crypto
   library. You might have to do this if target OpenSSL
application is
   executed on SSE2 capable CPU, but under control of OS
which does not
   support SSE2 extentions. Even though you can manipulate
the value
   programmatically, you most likely will find it more
appropriate to set
   up an environment variable with the same name prior
starting target
  -application, e.g. 'env OPENSSL_ia32cap=0x10
apps/openssl', to achieve
  -same effect without modifying the application source
code.
  +application, e.g. 'env OPENSSL_ia32cap=0x12800010
apps/openssl', to
  +achieve same effect without modifying the application
source code.
   Alternatively you can reconfigure the toolkit with
no-sse2 option and
   recompile.
   
   .
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