Next step of Hardware Theora

>> Derf, what do you think?

I don't know enough about the complexity implementing an
SDRAM
controller to say whether it should be one of the
"primary goals" or a
"secondary goal, time permitting". However, I
think it would be nice to
shoot for completing integration with Leon by the midterm
date (the week
of July 9; in approximately two months).  Then you will have
the entire
second half of the project to focus on the SDRAM controller.
That may
not be enough to finish it if it is really as complex as
last year's
entire GSoC project, but I would think you could make some
good
progress. When you talk to your professor tomorrow, he may
be able to
give you a better idea whether or not this is reasonable.
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Thanks for the updated summary, Andre. A few comments
below...

On Wed, May 09, 2007 at 02:15:46PM -0300, André Costa
wrote:

> 1 - Integration with a processor (Nios vs Leon)
> http://www.students.ic.unicamp.br/~ra031198
/integration_processor.JPG
> We will need to compile the initial part of Theora in a
processor and after
> to do a integration with the Hardware modules. For
this, we will need to
> choose the processor. Stratix II (FPGA Altera) have a
good support to NIOS.
> The alternative of a nonproprietary processor could be
the LEON, but I think
> it maybe demand pretty much work to do run.

Given the goals of the Summer of Code, I think getting the
decoder 
ported to an open source cpu design must have very high
priority.
Until this is done, no one else can play with the code.

> 3 - To do a video controller.
> http://www.students.ic.unicamp.br/~ra031198/vide
o_controller.JPG
> This will be a module after the UpdateUMVBorder
(function in Hardware). It
> will be the "player", the module in hardware
that will put the images on
> video. I will talk with Leonardo, because it seems that
He want to do this
> module.

Being able to see it work is good too. 

> 5 - To put the current Hardware Theora of old for new
VP3 codebase.
> 
> Timothy told me about the old and new VP3 codebase, but
I am a little
> confused.

It's the same format, but Timothy has written a new decoder
which is a 
more clean and robust implementation that what was in
alpha6/alpha7. If 
you check out current theora svn, you will find this code in
lib/dec/

I'm not sure what Timothy asked for, but it's at least worth
looking at 
for ideas and improvements for your implementation.

 -r
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On 5/11/07, André Costa <andre.lncgmail.com> wrote:
> Thanks for Feedback,
>
> I have been talked with some people, we (I, Felipe and
Leonardo) know a
> group (that worked with us) that did a MPEG decoder in
hardware at Brazil
> and they have been helped us with some tips in others
list. Also, I had a
> chat with my professor and now I think it is more clear
about LEON and SDRAM
> controller.
>
> First, I agree with you, the priority should be the
LEON. How Ralph said,
> until this is done, no one else can play with the
code.
>
> LEON3
> figure 1:
> http://www.students.ic.unicamp.br/~ra031198/leon3.JPG
>
> It is a excellent nonproprietay processor, very
flexible and has a lot of
> components that can be pluged (like Memory controller,
jTag, AMBA).
>
> The steps would be:
>
> - To find a configuration that be able to decode the
Theora.
> - Synthesis of LEON3
> - To compile only de initial part of Theora for LEON
and to run this inside
> of the LEON.
> - To change the handshake of Theora Hardware of AVALON
to AMBA protocol.
> - Integrate the processor and theora hardware
>
> In think the hard part would be to debug this,
construct a testbench to test
> this. To learn the LEON3 features/configuration and the
protocols would be
> dificult too.
>
> SDRAM Controller and FlashCard
> Yes. To do it in Hardware would be much complicate,
because there are many
> constrains and the SDRAM is very rigid with timing. For
this, I would need
> to have a good study of the datasheet before to start
the developing.
>
> In the other list we had the ideia of work with a Flash
Card, but It is very
> slow. The Flash card would be nice to store the Videos
encoded.
>
> LEON3/Memory Controller
>
> How you can see in figure 1, the LEON3 has a Memory
Controller of SDRAM.
> The LEON will use this to execute the functions of the
intial decoding.
> figure 2:
> 
http://www.students.ic.unicamp.br/~ra031198/fig2.JPG
>
> Ok, then we can use this SDRAM memory controller to
buffer of the Theora
> Hardware?
> Something like this:
> figure 3:
> 
http://www.students.ic.unicamp.br/~ra031198/fig3.JPG

I don't like the implementation above. As you said I think
that it
might overload the AMBA bus.


>
> This answer I still don't, because it's depende of the
AMBA, frequecie of
> operation and data throuput. AMBA is a little slow, I
think it will not get
> to answer the LEON and Theora Hardware requests in
time. But It is could be
> tested.
>
> If it is not ok, the alternative would be copy the
memory controller to use
> with the SRAM
> figure 4:
> 
http://www.students.ic.unicamp.br/~ra031198/fig4.JPG
>

I think this is better because in this implementation the
processor is
used just for the software part. And if we have throughput
problem we
can easier convert to a pipelined implementation than the
other one.

>
> LEON3/VGA controller
> Beyond this, LEON3 has a VGA controller, but I don't
know if it would be
> necessary to plug with Theora Hardware. But I think
that could happen the
> same problem of the SDRAM, It could overload the AMBA.
And then, I think It
> should be unpluged of AMBA and to plug directly with
the Theora Hardware.
> The group that we know did a Video Controller (for
MPEG) in hardware. It
> seems to be not much dificult to do, maybe it is more
interesting to
> Leonardo to do one.
>

Yes, I have studied the Lancelot VGA controller (this is the
board we
have in our laboratory). I'm thinking in developing the VGA
controller
as a separated module from Theora Hardware. In this manner
the
integration will be done by a simple handshake protocol.
This would reduce the dependency between the VGA Controller 
and the
Theora Hardware.

>
>
> What do you think?
>
> André Costa
>
>
> On 5/9/07, Timothy B. Terriberry <tterribevt.edu> wrote:
> > >> Derf, what do you think?
> >
> > I don't know enough about the complexity
implementing an SDRAM
> > controller to say whether it should be one of the
"primary goals" or a
> > "secondary goal, time permitting".
However, I think it would be nice to
> > shoot for completing integration with Leon by the
midterm date (the week
> > of July 9; in approximately two months).  Then you
will have the entire
> > second half of the project to focus on the SDRAM
controller. That may
> > not be enough to finish it if it is really as
complex as last year's
> > entire GSoC project, but I would think you could
make some good
> > progress. When you talk to your professor
tomorrow, he may be able to
> > give you a better idea whether or not this is
reasonable.
> >
>
>
>
> --
>
> André Costa
> Gerente Técnico
> Projeto BrazilIP
> LSC IC-UNICAMP
>
> Cel: + 55 13 9201 1870
> http://www.brazilip.org.b
r/


-- 
Leonardo de Paula Rosa Piga
Undergraduate Computer Engineering Student
LSC - IC - UNICAMP
http://ww
w.students.ic.unicamp.br/~ra033956
_______________________________________________
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theora-devxiph.org
htt
p://lists.xiph.org/mailman/listinfo/theora-dev

On 5/11/07, Leonardo de Paula Rosa Piga <lpigaterra.com.br> wrote:
> On 5/11/07, André Costa <andre.lncgmail.com> wrote:
> > Thanks for Feedback,
> >
> > I have been talked with some people, we (I, Felipe
and Leonardo) know a
> > group (that worked with us) that did a MPEG
decoder in hardware at Brazil
> > and they have been helped us with some tips in
others list. Also, I had a
> > chat with my professor and now I think it is more
clear about LEON and SDRAM
> > controller.
> >
> > First, I agree with you, the priority should be
the LEON. How Ralph said,
> > until this is done, no one else can play with the
code.
> >
> > LEON3
> > figure 1:
> > http://www.students.ic.unicamp.br/~ra031198/leon3.JPG
> >
> > It is a excellent nonproprietay processor, very
flexible and has a lot of
> > components that can be pluged (like Memory
controller, jTag, AMBA).
> >
> > The steps would be:
> >
> > - To find a configuration that be able to decode
the Theora.
> > - Synthesis of LEON3
> > - To compile only de initial part of Theora for
LEON and to run this inside
> > of the LEON.
> > - To change the handshake of Theora Hardware of
AVALON to AMBA protocol.
> > - Integrate the processor and theora hardware
> >
> > In think the hard part would be to debug this,
construct a testbench to test
> > this. To learn the LEON3 features/configuration
and the protocols would be
> > dificult too.
> >
> > SDRAM Controller and FlashCard
> > Yes. To do it in Hardware would be much
complicate, because there are many
> > constrains and the SDRAM is very rigid with
timing. For this, I would need
> > to have a good study of the datasheet before to
start the developing.
> >
> > In the other list we had the ideia of work with a
Flash Card, but It is very
> > slow. The Flash card would be nice to store the
Videos encoded.
> >
> > LEON3/Memory Controller
> >
> > How you can see in figure 1, the LEON3 has a
Memory Controller of SDRAM.
> > The LEON will use this to execute the functions of
the intial decoding.
> > figure 2:
> > 
http://www.students.ic.unicamp.br/~ra031198/fig2.JPG
> >
> > Ok, then we can use this SDRAM memory controller
to buffer of the Theora
> > Hardware?
> > Something like this:
> > figure 3:
> > 
http://www.students.ic.unicamp.br/~ra031198/fig3.JPG
>
> I don't like the implementation above. As you said I
think that it
> might overload the AMBA bus.

Me too
I agree with Leonardo
The AMBA bus will be overloaded and will not be able to give
the
throughput that we need.
This choice is not feasible.


>
>
> >
> > This answer I still don't, because it's depende of
the AMBA, frequecie of
> > operation and data throuput. AMBA is a little
slow, I think it will not get
> > to answer the LEON and Theora Hardware requests in
time. But It is could be
> > tested.
> >
> > If it is not ok, the alternative would be copy the
memory controller to use
> > with the SRAM
> > figure 4:
> > 
http://www.students.ic.unicamp.br/~ra031198/fig4.JPG
> >
>
> I think this is better because in this implementation
the processor is
> used just for the software part. And if we have
throughput problem we
> can easier convert to a pipelined implementation than
the other one.

I agree with Leonardo.


>
> >
> > LEON3/VGA controller
> > Beyond this, LEON3 has a VGA controller, but I
don't know if it would be
> > necessary to plug with Theora Hardware. But I
think that could happen the
> > same problem of the SDRAM, It could overload the
AMBA. And then, I think It
> > should be unpluged of AMBA and to plug directly
with the Theora Hardware.
> > The group that we know did a Video Controller (for
MPEG) in hardware. It
> > seems to be not much dificult to do, maybe it is
more interesting to
> > Leonardo to do one.
> >
>
> Yes, I have studied the Lancelot VGA controller (this
is the board we
> have in our laboratory). I'm thinking in developing the
VGA controller
> as a separated module from Theora Hardware. In this
manner the
> integration will be done by a simple handshake
protocol.
> This would reduce the dependency between the VGA
Controller  and the
> Theora Hardware.

This is good
A modular design is easier to develop and maintain too.

>
> >
> >
> > What do you think?
> >
> > André Costa
> >
> >
> > On 5/9/07, Timothy B. Terriberry <tterribevt.edu> wrote:
> > > >> Derf, what do you think?
> > >
> > > I don't know enough about the complexity
implementing an SDRAM
> > > controller to say whether it should be one of
the "primary goals" or a
> > > "secondary goal, time permitting".
However, I think it would be nice to
> > > shoot for completing integration with Leon by
the midterm date (the week
> > > of July 9; in approximately two months). 
Then you will have the entire
> > > second half of the project to focus on the
SDRAM controller. That may
> > > not be enough to finish it if it is really as
complex as last year's
> > > entire GSoC project, but I would think you
could make some good
> > > progress. When you talk to your professor
tomorrow, he may be able to
> > > give you a better idea whether or not this is
reasonable.
> > >
> >
> >
> >
> > --
> >
> > André Costa
> > Gerente Técnico
> > Projeto BrazilIP
> > LSC IC-UNICAMP
> >
> > Cel: + 55 13 9201 1870
> > http://www.brazilip.org.b
r/
>
>
> --
> Leonardo de Paula Rosa Piga
> Undergraduate Computer Engineering Student
> LSC - IC - UNICAMP
> http://ww
w.students.ic.unicamp.br/~ra033956
>


-- 
________________________________________
Felipe Portavales Goldstein <portavales at gmail>
Undergraduate Student - IC-UNICAMP
Computer Systems Laboratory
http://w
ww.students.ic.unicamp.br/~ra023772/
_______________________________________________
theora-dev mailing list
theora-devxiph.org
htt
p://lists.xiph.org/mailman/listinfo/theora-dev

I updated the wiki page:

http://
wiki.xiph.org/index.php/TheoraHardware



On 5/12/07, Felipe Portavales Goldstein <portavalesgmail.com> wrote:
> On 5/11/07, Leonardo de Paula Rosa Piga <lpigaterra.com.br> wrote:
> > On 5/11/07, André Costa <andre.lncgmail.com> wrote:
> > > Thanks for Feedback,
> > >
> > > I have been talked with some people, we (I,
Felipe and Leonardo) know a
> > > group (that worked with us) that did a MPEG
decoder in hardware at Brazil
> > > and they have been helped us with some tips
in others list. Also, I had a
> > > chat with my professor and now I think it is
more clear about LEON and SDRAM
> > > controller.
> > >
> > > First, I agree with you, the priority should
be the LEON. How Ralph said,
> > > until this is done, no one else can play with
the code.
> > >
> > > LEON3
> > > figure 1:
> > > http://www.students.ic.unicamp.br/~ra031198/leon3.JPG
> > >
> > > It is a excellent nonproprietay processor,
very flexible and has a lot of
> > > components that can be pluged (like Memory
controller, jTag, AMBA).
> > >
> > > The steps would be:
> > >
> > > - To find a configuration that be able to
decode the Theora.
> > > - Synthesis of LEON3
> > > - To compile only de initial part of Theora
for LEON and to run this inside
> > > of the LEON.
> > > - To change the handshake of Theora Hardware
of AVALON to AMBA protocol.
> > > - Integrate the processor and theora
hardware
> > >
> > > In think the hard part would be to debug
this, construct a testbench to test
> > > this. To learn the LEON3
features/configuration and the protocols would be
> > > dificult too.
> > >
> > > SDRAM Controller and FlashCard
> > > Yes. To do it in Hardware would be much
complicate, because there are many
> > > constrains and the SDRAM is very rigid with
timing. For this, I would need
> > > to have a good study of the datasheet before
to start the developing.
> > >
> > > In the other list we had the ideia of work
with a Flash Card, but It is very
> > > slow. The Flash card would be nice to store
the Videos encoded.
> > >
> > > LEON3/Memory Controller
> > >
> > > How you can see in figure 1, the LEON3 has a
Memory Controller of SDRAM.
> > > The LEON will use this to execute the
functions of the intial decoding.
> > > figure 2:
> > > 
http://www.students.ic.unicamp.br/~ra031198/fig2.JPG
> > >
> > > Ok, then we can use this SDRAM memory
controller to buffer of the Theora
> > > Hardware?
> > > Something like this:
> > > figure 3:
> > > 
http://www.students.ic.unicamp.br/~ra031198/fig3.JPG
> >
> > I don't like the implementation above. As you said
I think that it
> > might overload the AMBA bus.
>
> Me too
> I agree with Leonardo
> The AMBA bus will be overloaded and will not be able to
give the
> throughput that we need.
> This choice is not feasible.
>
>
> >
> >
> > >
> > > This answer I still don't, because it's
depende of the AMBA, frequecie of
> > > operation and data throuput. AMBA is a little
slow, I think it will not get
> > > to answer the LEON and Theora Hardware
requests in time. But It is could be
> > > tested.
> > >
> > > If it is not ok, the alternative would be
copy the memory controller to use
> > > with the SRAM
> > > figure 4:
> > > 
http://www.students.ic.unicamp.br/~ra031198/fig4.JPG
> > >
> >
> > I think this is better because in this
implementation the processor is
> > used just for the software part. And if we have
throughput problem we
> > can easier convert to a pipelined implementation
than the other one.
>
> I agree with Leonardo.
>
>
> >
> > >
> > > LEON3/VGA controller
> > > Beyond this, LEON3 has a VGA controller, but
I don't know if it would be
> > > necessary to plug with Theora Hardware. But I
think that could happen the
> > > same problem of the SDRAM, It could overload
the AMBA. And then, I think It
> > > should be unpluged of AMBA and to plug
directly with the Theora Hardware.
> > > The group that we know did a Video Controller
(for MPEG) in hardware. It
> > > seems to be not much dificult to do, maybe it
is more interesting to
> > > Leonardo to do one.
> > >
> >
> > Yes, I have studied the Lancelot VGA controller
(this is the board we
> > have in our laboratory). I'm thinking in
developing the VGA controller
> > as a separated module from Theora Hardware. In
this manner the
> > integration will be done by a simple handshake
protocol.
> > This would reduce the dependency between the VGA
Controller  and the
> > Theora Hardware.
>
> This is good
> A modular design is easier to develop and maintain
too.
>
> >
> > >
> > >
> > > What do you think?
> > >
> > > André Costa
> > >
> > >
> > > On 5/9/07, Timothy B. Terriberry
<tterribevt.edu> wrote:
> > > > >> Derf, what do you think?
> > > >
> > > > I don't know enough about the complexity
implementing an SDRAM
> > > > controller to say whether it should be
one of the "primary goals" or a
> > > > "secondary goal, time
permitting". However, I think it would be nice to
> > > > shoot for completing integration with
Leon by the midterm date (the week
> > > > of July 9; in approximately two months).
 Then you will have the entire
> > > > second half of the project to focus on
the SDRAM controller. That may
> > > > not be enough to finish it if it is
really as complex as last year's
> > > > entire GSoC project, but I would think
you could make some good
> > > > progress. When you talk to your
professor tomorrow, he may be able to
> > > > give you a better idea whether or not
this is reasonable.
> > > >
> > >
> > >
> > >
> > > --
> > >
> > > André Costa
> > > Gerente Técnico
> > > Projeto BrazilIP
> > > LSC IC-UNICAMP
> > >
> > > Cel: + 55 13 9201 1870
> > > http://www.brazilip.org.b
r/
> >
> >
> > --
> > Leonardo de Paula Rosa Piga
> > Undergraduate Computer Engineering Student
> > LSC - IC - UNICAMP
> > http://ww
w.students.ic.unicamp.br/~ra033956
> >
>
>
> --
> ________________________________________
> Felipe Portavales Goldstein <portavales at
gmail>
> Undergraduate Student - IC-UNICAMP
> Computer Systems Laboratory
> http://w
ww.students.ic.unicamp.br/~ra023772/
>


-- 
________________________________________
Felipe Portavales Goldstein <portavales at gmail>
Undergraduate Student - IC-UNICAMP
Computer Systems Laboratory
http://w
ww.students.ic.unicamp.br/~ra023772/
_______________________________________________
theora-dev mailing list
theora-devxiph.org
htt
p://lists.xiph.org/mailman/listinfo/theora-dev